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เข้าร่วมเมื่อ 8 ส.ค. 2016
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1. 8085 Microprocessor (Assembly Language Program)
2. 8086 Microprocessor (Assembly Language Program)
3. 8051 - Microcontroller ( Concepts & Programming skills)
4. Digital Electronics
5. Basic Electronics
6. Quantitative Aptitude
7. Competitive Exam Questions
8. VLSI Design
9. Verilog HDL
1. 8085 Microprocessor (Assembly Language Program)
2. 8086 Microprocessor (Assembly Language Program)
3. 8051 - Microcontroller ( Concepts & Programming skills)
4. Digital Electronics
5. Basic Electronics
6. Quantitative Aptitude
7. Competitive Exam Questions
8. VLSI Design
9. Verilog HDL
Implementation of 2X1 Mux using Pass transistor
A 4-to-1 multiplexer (MUX) using pass transistor logic is an efficient way to design a combinational circuit that selects one of four inputs to pass to a single output, based on two selection lines (S1 and S0). Pass transistor logic relies on transistors to control the flow of input signals directly to the output without additional logic gates.
มุมมอง: 314
วีดีโอ
Implementation XNOR Gate Using Pass Transistor
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Implementation XNOR Gate Using Pass Transistor
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Implementation XOR Gate Using Pass Transistor
SR Flipflop | Digital Electronics | S Vijay Murugan | Learn Thought
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Difference between Combinational and Sequential Circuit | Digital Electronics | S Vijay Murugan
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Difference between Combinational and Sequential Circuit | Digital Electronics | S Vijay Murugan
Implementation of Logic Gate Using Only NAND Gate || Learn Thought || S Vijay Murugan
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Implementation of Logic Gate Using Only NAND Gate || Learn Thought || S Vijay Murugan
FOREVER Loop in Verilog HDL || Verilog HDL || S Vijay Murugan || Learn Thought
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FOREVER Loop in Verilog HDL || Verilog HDL || S Vijay Murugan || Learn Thought
Repeat Loop in Verilog HDL | Verilog HDL || S Vijay Murugan || Learn Thought
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Repeat Loop in Verilog HDL | Verilog HDL || S Vijay Murugan || Learn Thought
Binary Counter Using For Loop || Verilog HDL || S Vijay Murugan || Learn Thought
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Swapping Two Variables Using Non Blocking Assignments
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Swapping Two Variables Using Non Blocking Assignments
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Hi. Can you please explain that while writing the new equation of Sum, why are you only considering the logic 1 variables to make the equation of Sum and not like the simple k-map? Please let me know.
Sir how this program store carry untill we give increment c by one.
Thnk u so much sir
can you please share testbench code as well using tasks
Thank you sir❤️
Sir plz
Sir can you send me the 2 sets of model qp of sub dsdv BEC302
What is mean by tc sir
tc means Terminal Count. Thanks for watching, keep watching and support us to make more videos.
That was helpful , thank you sir 🤍
Thankyou for reply sir how and where to start vlsi or embedded
You can start by learning the basics of digital electronics and programming languages like Verilog and system verilog. There are lots of opening in this field.
Sir i have 10 years career gap after btech can i get a job doing embedded course
Of course you join the course definitely you will get good opportunity.
thank u sir i really have a question so the carry flag does not impact either 1 or 0 when we'ill shift we sift with 0 not with what carry flag contains right ?? thank u another time ; from Morocco
If you perform the shift operation we need external bit (0) then oly the value shift from right to left or left to right. The Msb Or Lsb data move in to carry bit.
Easily coded ❤
Thank you, keep watching and support us to make more videos.
Please do complete syllabus of ece
You are belongs to which university
Thank you sir for your wonderful explaination🎉🎉🎉
You are most welcome, keep watching and support us to make more videos
Thank you sir
Welcome, keep watching and support us to make more videos
Very helpful sir
Very helpful❤
it helps, thx
Your teaching is good. There is no clarity in video sir
Thank you, I'll try to improve the clarity in future videos.
Sir can u please provide...urs handwritten notes..... And this details is enough for 13 marks for semester????
💯
Big fan bro
Nice video sir ❤
Sir thank you lectures are very helpful to easily understand the concept
And what about the complement for the whole equation as given in the question.
If the equation is in un complement form use cmos inverter at the end of the circuit otherwise no need to use.
Intresting
Thanks you sir❤
You have just saved me sir ❤
Thank you.
Ur a genius sir
really explaining concept very well sir
Thanks and keep watching for more concepts.
Sir use any mic for recording
Thaks for your suggestions, keep watching and support us to make more videos.
Thank you sir
Welcome, keep watching and support us to make more videos.
Good Explanation sir
super explanation sir
Thanks and welcome, keep watching and support us to make more videos.
❤❤❤❤❤ tqqqq bro U saved meee for my sem exam's 😊
Glad it helped, keep watching and support us to make more videos.
very useful thanks sir
Darren
At the pMOS A.B connection, you have placed the input of pMOS B incorrectly. It needs to be reversed to work correctly.
Great explanation sir Thanks a lot ❤
Most welcome, keep watching and support us to make more videos.
Thanks
Welcome, keep watching and support us to make more videos
thank you so much dude, you explained better then my teacher
You're welcome, keep watching and support us to make more videos.
Very helpful sirr
Keep watching and support us to make more videos.
good explanation
Memory classification, architecture,core memory peripheral circuitry in (vlsi and chip design) plz tech sir
will soon upload, keep watching and support us to make more videos
@@learnthought3871tq... ok sir I'm waiting... Konjam sikaram upload panuga sir
Good explanation! keep it up sir 👍🏻🤝🏻
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Sir actually it was wrong declaration in wire it will be [5:0] bus representation will not be allowed [6:0] cause it will start from 0 to 5
[6:0] means totally 7 bit, but in that configuration we have a six signal only so that represent [5:0].
Thankkk youuu
You're welcome 😊, keep watching and support us to make more videos.
Nice video easy to understand
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Talented enough to watch in 30min before end-semester😂😂😂😂
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