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Derek Johnston
เข้าร่วมเมื่อ 10 มี.ค. 2019
วีดีโอ
ECE 2372.002 November 18th "State Tables and Graphs"
มุมมอง 3823 ปีที่แล้ว
ECE 2372.002 November 18th "State Tables and Graphs"
ECE 2372.001 November 18th "State Tables and Graphs"
มุมมอง 3303 ปีที่แล้ว
Steps for deriving a state table and state graph from a sequential logic circuit.
ECE 2372.002 November 16th "Signal Tracing"
มุมมอง 8853 ปีที่แล้ว
ECE 2372.002 November 16th "Signal Tracing"
ECE 3304 November 16th "Differentiation and Integration"
มุมมอง 1683 ปีที่แล้ว
ECE 3304 November 16th "Differentiation and Integration"
ECE 2372.001 November 16th "Moore and Mealy Sequential Circuits"
มุมมอง 5023 ปีที่แล้ว
ECE 2372.001 November 16th "Moore and Mealy Sequential Circuits"
ECE 2372.002 November 13th "Binary Counters"
มุมมอง 1743 ปีที่แล้ว
ECE 2372.002 November 13th "Binary Counters"
ECE 3304.001 November 13th "Convolution and Windows"
มุมมอง 1363 ปีที่แล้ว
ECE 3304.001 November 13th "Convolution and Windows"
ECE 3304 November 6th "Discrete Cosine Transform"
มุมมอง 2853 ปีที่แล้ว
ECE 3304 November 6th "Discrete Cosine Transform"
ECE 2372.001 November 13th "Binary Counters"
มุมมอง 2943 ปีที่แล้ว
ECE 2372.001 November 13th "Binary Counters"
ECE 2372.002 November 11th "Shift Registers"
มุมมอง 3293 ปีที่แล้ว
Serial and Parallel Shift Registers.
ECE 2372.001 November 11th "Shift Registers"
มุมมอง 2963 ปีที่แล้ว
Serial and Parallel Shift Registers
ECE 3304.001 November 11th "Discrete Fourier Transform Part 2"
มุมมอง 633 ปีที่แล้ว
ECE 3304.001 November 11th "Discrete Fourier Transform Part 2"
ECE 2372.002 November 9th "Registers and Register Transfers"
มุมมอง 1K3 ปีที่แล้ว
ECE 2372.002 November 9th "Registers and Register Transfers"
ECE 3304.001 November 9th "Discrete Fourier Transform"
มุมมอง 803 ปีที่แล้ว
ECE 3304.001 November 9th "Discrete Fourier Transform"
ECE 3304.001 November 4th "Correlation"
มุมมอง 1323 ปีที่แล้ว
ECE 3304.001 November 4th "Correlation"
ECE 2372.001 November 4th "Edge Triggered Flip Flops"
มุมมอง 3943 ปีที่แล้ว
ECE 2372.001 November 4th "Edge Triggered Flip Flops"
ECE 2372.002 November 2nd "S-R Latches"
มุมมอง 1.2K3 ปีที่แล้ว
ECE 2372.002 November 2nd "S-R Latches"
ECE 2372.001 November 2nd "S-R Latches"
มุมมอง 2713 ปีที่แล้ว
ECE 2372.001 November 2nd "S-R Latches"
ECE 2372.002 October 30th "Multiplexers in Verilog"
มุมมอง 3653 ปีที่แล้ว
ECE 2372.002 October 30th "Multiplexers in Verilog"
ECE 3304.001 October 30th "Non-Periodic Signals"
มุมมอง 1203 ปีที่แล้ว
ECE 3304.001 October 30th "Non-Periodic Signals"
ECE 2372.001 October 30th "Multiplexers in Verilog"
มุมมอง 5293 ปีที่แล้ว
ECE 2372.001 October 30th "Multiplexers in Verilog"
ECE 2372.002 October 28th "Combinational Logic in Verilog"
มุมมอง 6163 ปีที่แล้ว
ECE 2372.002 October 28th "Combinational Logic in Verilog"
ECE 2372.001 October 28th "Combinational Logic in Verilog"
มุมมอง 4543 ปีที่แล้ว
ECE 2372.001 October 28th "Combinational Logic in Verilog"
ECE 2372.002 October 26th "Getting Started with Verilog"
มุมมอง 5543 ปีที่แล้ว
ECE 2372.002 October 26th "Getting Started with Verilog"
ECE 3304.001 October 26th "Signals and Spectrum"
มุมมอง 1413 ปีที่แล้ว
ECE 3304.001 October 26th "Signals and Spectrum"
ECE 2372.001 October 26th "Getting Started with Verilog"
มุมมอง 4983 ปีที่แล้ว
ECE 2372.001 October 26th "Getting Started with Verilog"
Time 11:11
Still saving lives 3 years on! Great video!
Thank you derek bhai love you.
Hi i need really your help i have just start to learn this field and i am stuck in GTKWAVE. currently i have macbook m2 chip with version macos sonoma 14.6.1 while observing your video i am able to download the GTKWAVE but while using it for my codes it can not running. it shows you need to update or contact developer.
Would you consider doing an example for a Delta-Y, Unbalanced Load, with Line Impedances, NOT converting the source to a Y equivalent, calculating the source, line, and load currents, power delivered, and power consumed.
Someone help, I've got a problem. The vvp file isn't getting created. And it gives me the error "Unable to open input file". What do I do?!
iverilog : The term 'iverilog' is not recognized as the name of a cmdlet, function, script file, or operable program. Check the spelling of the name, or if a path was included, verify that the path is correct and try again. I'm having this problem , can you please help me with me it?
Thank you for the series.
great , thanks!
visual studio code stopping working for no reason is the most relatable thing to happen to any programmer :')
thank you
Thanks
Next time remind us to like your video
Great balanced load example. Can you do some unbalanced load examples, thanks.
"WORKING" tutorial.
help, for some reason I can't create a wave form file from the .vvp file?
Got accepted into engineering. This helps man. Much obliged.
You are a lifesaver. You helped me finish my digital logic lab final course project. Everything compiles, runs, and I have waveforms. I know this is simple to you but I am just a beginner and it's still white magic to me. Respect.
Nice ❤
you look like Gale from Breaking Bad
Thank you so much!! Very Clear!!👍👍👍
Thank you!
gtkwave doesn't seem to work on macos 14, can you suggeest a solution?
won't this create a latch instead of a flipflop since you didn't write the else statement?
wouldn't it not be (rt - r) for the E(r)?
yea i felt the same
@@lakshminiharika4918 yep me three
Type the following command in your terminal if you have an Apple silicon based computer: brew install --HEAD randomplum/gtkwave/gtkwave
just copied the answer
is it always 125?
wolf man you are great
i cant find verilog in the explorer
I want to learn Verilog and also want to practice. Can you please suggest the steps to take? I want to be very good at it. Iknow digital electronics already. thank
How to solve for currents i1 and i2?...Can we use a calculator?? Kindly assist.
How shitty is this , Why dont you explain that clearly you already hav installed the Visual Studio Code and how acces icarus in that . Fucking Attitude
Did GTKwave prompt anyone else to also install Rosetta, enabling GTK to run on Macs M chips?
All the currents aren't going into the nodes you must have a current leaving.
I wish I had you as a professor at my university. You're such a great professor for this course.
half_adder.vvp: Unable to open input file. getting this error please help
You're a king
thank you so much for the explanation.. very nice
Very nice vid👍
Very simple explanation with a good example. Thanks!!
Thank you for making these videos accesible, they've been very helpful.
Thank you for the helpful video. It's surprisingly difficult to compile and simulate Verilog on a Mac and this was exactly what I needed!
My vcd file is not opening please help
great content!
man u left one basic thing to explain that is how setup a verilog extension
Thanks for such a clear explanation
Seems a lot simpler 40 years later...8)
what vs code color theme is that?
you are a lifesaver!