- 91
- 342 014
Electronics Lab DIY
เข้าร่วมเมื่อ 7 ส.ค. 2017
To spread the VLSI culture by making available the resources and developing innovative Circuits n Microsystems. It’s all about design and demonstration.
Learn || Think || Design
For any query, contact - labee311@gmail.com
Learn || Think || Design
For any query, contact - labee311@gmail.com
วีดีโอ
Analog IC Testing in IIT Guwahati Lab || RFIC Measurements using Probe Station
มุมมอง 1.1Kปีที่แล้ว
Glimps of Testing Designer - Praveen #rfic #analogic #chip
Cadence-19: EMX Inductor Design | On-Chip Inductor Design for high Q and L with freq | EM Simulation
มุมมอง 5Kปีที่แล้ว
Cadence-19: EMX Inductor Design | On-Chip Inductor Design for high Q and L with freq | EM Simulation
Cadence-18: PEX of Layout using Calibre || Post Layout Simulation
มุมมอง 3.2Kปีที่แล้ว
Cadence-18: PEX of Layout using Calibre || Post Layout Simulation
Cadence-17: LVS using Calibre || Layout vs Schematic (LVS) check || Cadence Layout debugging
มุมมอง 2Kปีที่แล้ว
Cadence-17: LVS using Calibre || Layout vs Schematic (LVS) check || Cadence Layout debugging
Cadence-16: DRC of Layout in Calibre | Design Rule Check (DRC) || Post Layout Simulation
มุมมอง 1.5Kปีที่แล้ว
Cadence-16: DRC of Layout in Calibre | Design Rule Check (DRC) || Post Layout Simulation
Cadence-15: Layout of MOS || fingers | Multipliers | RFMOS Layout || Post Layout Simulation
มุมมอง 3.4Kปีที่แล้ว
Note- In this tutorial, we made a layout for W=54u and L=60n. First 54 is divided into 4 multiples for efficient layout then one (out of 4) layout is drawn and replicated as 4 that combined gives final layout for W=54u. Width per finger = 1.5u Multiplier = 4 No. of fingers = 54/(4*1.5) = 9 Basics of layout design video - th-cam.com/video/bCfS5VfIkIc/w-d-xo.html #layout #cadence #icdesign
Cadence-14: Basics of Layout Design and Debugging | Calibre Cadence Layout Rules 4 Error free design
มุมมอง 1.8Kปีที่แล้ว
Cadence-14: Basics of Layout Design and Debugging | Calibre Cadence Layout Rules 4 Error free design
Spice Simulation using NGspice || Nodal and Mesh Analysis using spice l Basics of spice
มุมมอง 247ปีที่แล้ว
Spice Code for Nodal & Mesh - github.com/ElectronicsLabDIY/ElectronicsLabDIY.github.io/blob/6880f720e29b87d39f0f5ca6489a0093e23cc613/spice/nodal_mesh_analysis
Cadence-13: Replace AnalogLib passives with TSMC library | Inductor from TSMC library | foundry PDK
มุมมอง 1.2Kปีที่แล้ว
Note- As a first level of design, one start building circuit by using passives from analogLib and finally need to replace these passives with Foundry PDK. This video explains that transition and best way to replace with correct values in foundry models
Cadence-12: Creating Symbol from schematic in Cadence || Virtuoso symbol creation
มุมมอง 5Kปีที่แล้ว
Cadence-12: Creating Symbol from schematic in Cadence || Virtuoso symbol creation
From Idea to Chip Design || IC Chip: step by step for mental picture || Explained Chip for dummies
มุมมอง 2Kปีที่แล้ว
From Idea to Chip Design || IC Chip: step by step for mental picture || Explained Chip for dummies
MOS I-V plot, output characteristic using Spice || NGspice nMOS | Pspice | LTspice #spice
มุมมอง 955ปีที่แล้ว
MOS I-V plot, output characteristic using Spice || NGspice nMOS | Pspice | LTspice #spice
3 input NAND Gate using spice || NGspice | Pspice | Spice tutorial | LTspice #spice
มุมมอง 1.1Kปีที่แล้ว
3 input NAND Gate using spice || NGspice | Pspice | Spice tutorial | LTspice #spice
How to Write Spice code || Inverter Simulation using NGspice | Pspice | Spice Netlist
มุมมอง 7Kปีที่แล้ว
How to Write Spice code || Inverter Simulation using NGspice | Pspice | Spice Netlist
VLSI Open Source Tools | Free CAD | Open Circuit Design || open PDK || efabless | Democratize IC
มุมมอง 724ปีที่แล้ว
VLSI Open Source Tools | Free CAD | Open Circuit Design || open PDK || efabless | Democratize IC
What is Netlist || PSpice netlist Ngspice || LTspice Netlist || Netlist in VLSI || spice netlist
มุมมอง 991ปีที่แล้ว
What is Netlist || PSpice netlist Ngspice || LTspice Netlist || Netlist in VLSI || spice netlist
Nano eNabler || Molecular Printing System | MPS || Biosensors || nanomaterial Printing
มุมมอง 234ปีที่แล้ว
Nano eNabler || Molecular Printing System | MPS || Biosensors || nanomaterial Printing
PVD | Metallization || Instruments used for Metal thin film Deposition || VLSI Technology
มุมมอง 322ปีที่แล้ว
PVD | Metallization || Instruments used for Metal thin film Deposition || VLSI Technology
Silicon Wafer Cleaning || VLSI Technology
มุมมอง 3.1Kปีที่แล้ว
Silicon Wafer Cleaning || VLSI Technology
SAW Resonator Fabrication || MEMS resonator for Sensing | SAW Filter || PiezoMEMS
มุมมอง 1.1Kปีที่แล้ว
SAW Resonator Fabrication || MEMS resonator for Sensing | SAW Filter || PiezoMEMS
IIT Guwahati PhD EEE Research Scholar Forum Events n Team || RSF EEE
มุมมอง 169ปีที่แล้ว
IIT Guwahati PhD EEE Research Scholar Forum Events n Team || RSF EEE
Simulate S-Parameters in COMSOL || SAW gas sensor | Acoustic Wave
มุมมอง 4.2K2 ปีที่แล้ว
Simulate S-Parameters in COMSOL || SAW gas sensor | Acoustic Wave
Admittance & Displacement plots in COMSOL of SAW Sensor with frequency || Surface Acoustic Tutorial
มุมมอง 4K2 ปีที่แล้ว
Admittance & Displacement plots in COMSOL of SAW Sensor with frequency || Surface Acoustic Tutorial
SAW Gas Sensor COMSOL || Tutorial Acoustic Wave Simulation in COMSOL
มุมมอง 7K2 ปีที่แล้ว
SAW Gas Sensor COMSOL || Tutorial Acoustic Wave Simulation in COMSOL
Introduction to COMSOL Multiphysics and its Modules | COMSOL Tutorial
มุมมอง 1.2K2 ปีที่แล้ว
Introduction to COMSOL Multiphysics and its Modules | COMSOL Tutorial
What is Finite Element Method (FEM)| Multiphysics tools | COMSOL Tutorial
มุมมอง 3.9K2 ปีที่แล้ว
What is Finite Element Method (FEM)| Multiphysics tools | COMSOL Tutorial
Calculate Cgs by Cadence Simulation || Gate Capacitance of MOS - Cadence Virtuoso #10
มุมมอง 13K2 ปีที่แล้ว
Calculate Cgs by Cadence Simulation || Gate Capacitance of MOS - Cadence Virtuoso #10
Cadence-9: Xf Analysis to plot Gain vs frequency in Cadence Virtuoso || Cadence Tutorial
มุมมอง 10K2 ปีที่แล้ว
Cadence-9: Xf Analysis to plot Gain vs frequency in Cadence Virtuoso || Cadence Tutorial
Cadence-8: Noise Analysis || Noise Figure (NF) of LNA using Cadence Virtuoso | Tutorial
มุมมอง 12K2 ปีที่แล้ว
Cadence-8: Noise Analysis || Noise Figure (NF) of LNA using Cadence Virtuoso | Tutorial
Thanks!!
I cannot access this site it says “unreachable” on my machine
opencircuitdesign.com/ try this.... it will work
Hi! Great Video! How have you generated the process file (.proc) ? Is it possible to use calibre to generate it?
Hi! Great video! How have you generated the process file (.proc)? Is it possible to generate it using calibre?
EMX tool
Superb effort
Lovely campus
What the f man, can't you use a proper microphon?
India is nowhere in producing mask for photo lithography.
What this SAW Gas sensor is actually sensing in results. What means result for each frequency? What means this mapping between frequency and picture in results?
Please how can l get the tsmcN65 library folder: thank you for this excellent tutorial so helpful
Very good explanation, thank you
Sir we are any idea on Reliability Analysis in Adexl? ?
Sir want to contact you, plz share.
labee311@gmail.com
Why are you using metal tweezer?
Sir can u show comparator string for 16 bit
please make a video on gas sensor not SAW gas sensor,, make video on other gas sensor
Could you tell how to calculate S21 and S22
interesting! What is the scale of the microscope?
Hi im a student , how can i get access to virtuoso?
Great
Nice explanation, thanks.
How are you running cadence on Mac? I'm very much troubled. can you help??
It is linux
@@GlossyReeli can see its written as rahuls macbook. Ofc cadence runs on linux but he is using ssh on mac terminal. Minne doesn’t open cadence if I repeat his steps.
But in terminal it shows welcome to ubuntu
@@GlossyReel that is ssh. Basically linux is running on a server. He is opening that window on his mac. That’s how cadence works. You use cadence?
@@gopukrishna521 i use but in virtualbox
that device is a transistor, filter, or something else? What instruments did you use as input and output?
sir what about the overall capacitance
like cdn and cdp
eve
nice bro, could provide me the overall circuit design, I want to re-implement it and practice more in IC circuits using cadence
Full Video of IIT Guwahti Campus- th-cam.com/video/O6Fo4Qi43ZY/w-d-xo.htmlsi=IuJYfJk2KQUFCZOS
to the point and explained beautifully
Vary beautiful campus
Hey How do we create a schematic symbol from the EMX simulation S-parameter results?
You're an absolute G thanks!
Hello are you also working on this
Thank you for your enthusiastic sharing. You spoke very well and helped me a lot as a beginner, especially the subtitle, which helped me a lot
Hi Sir Will dummy metal shape comes on fabrication mask?
Hi sri for which place address details contact details.
mesmerizing
Paradise 😊
true love*
IIT GUWAHATI my aim my dream ❤️
congratulations sir
Heaven on Earth, pyaar hogya ji, ab saari raat din parhna parega❤
Yes dii❤.mai toh dropper hoon
How to install ngspice ?
Bhaiya mujhe guide krrdon dropper hun please
Kitaab khaa hai kitaab khaa hai salaa
😂😂
Hi bro, can we generate parametrized layout for inductors and transformers in EMX similar to ASITIC? I'm designing a customized transformer in EMX? Could you please help me?
No we can't do that using EMX . Till now none of the version provides this facility - Praveen
@@ElectronicsLabDIYrahul did you draw guard ring with M1 only ? should it be connected to Substrate? Can i use higher order metal M9?can you please help me with drawing guardring?
*promo sm*
IIT GUWAHATI my aim my dream ❤️
Proud to you Dr. Prateek.
Superb❤!
can you provide low noise amplifier design tutorial
It will take at least a month. Occupied with other projects! But it will come for sure not only schematic but layout as well ;-)
In the spice code, can we directly start writing the info abt the connected src? Because in ur previous video you told the steps for writing the code in which We first have to type the info about components (such as transistor, resistor, etc) and then the info abt connected src.
sure! I even mentioned in previous video there is no particular order of writing nets n I’m following that order for my convenience. you can write first whatever you want. Note- If you are using any PDK then please remember to add the path for model file.
@@ElectronicsLabDIYrahul ok, thank u